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Prof.Dr. MURAT AŞKAR (RETIRED)
FACULTY OF ENGINEERING
PublicationsResearchMembership & Awards
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Education

  Bachelor's, Middle East Technical University, Electric-electronic. Eng.
  Master's, Middle East Technical University, Electric-electronic. Eng.
  Doctorate, Middle East Technical University, Electric-electronic. Eng.

Publications (INTERNATIONAL)

Journal Papers

  A.1 Enis Ungan, Murat Aşkar, A Wired-AND Current-Mode Logic Circuit Technique in CMOS for Low-Voltage, High Speed and Mixed Signal VLSIC. "Analog Integrated Circuits and Signal Processing", (1997), p.59-70.
  A.2 Ungan İ.E. and Aşkar, M., A Current Mode Logic for Llow voltage, High Speed, Mixed Mode VLSI Circuit. "Analog Integrated Circuits and Signal Processing", 21, (1999), p.263-270.
  A.3 Telli, A., Şimşek, D., Askar M., CMOS planar spiral inductor modeling and low noise amplifier design. "Microelectronics Journal", 37, (2006), p.71-78.
 

Conference Papers

  A.1 M.Aşkar, H.Derin, Ö.Yurtseven, Recursive Estimation of Gauss-Markov Processes Using Uncertain Observations. "", 12.Annual Asimolar Conference on Circuits, Systems, and Computers", (1978).
  A.2 M.Aşkar, H.Derin, Ö.Yurtseven, Joint Detection and Estimation of Gauss-Markov Processes. "Meco-78 Int. Symposium on Measurement and Control", (1978).
  A.3 M.Aşkar, H.Derin, A Bayesian Approach to Smoothing Problem. "EUSIPCO-80, First European Signal Processing Conference", (1980).
  A.4 M.Aşkar, H.Derin, Optimal Bayes Smoothing with Uncertain Observation. "IEEE International Symposium on Information Theory", (1981).
  A.5 M.Aşkar, H.Derin, Optimal Sequential Smoothing with Uncertain Observations. "21 st Annual Allerton Conference on Communication, Control and Comp.", (1983).
  A.6 M.Aşkar, H.Derin, Recursive Algorithms for Bayes Smoothing with Uncertain Observations. "Automatic Control Conference", (1983).
  A.7 M.Aşkar, Simultaneous Detection and Smoothing. "International Conference on Signal Processing", (1984).
  A.8 E.Tulunay, M.Aşkar, A.Ersak, Ö.Yüksel, A Study on Engineering Education-Industry Collaboration in Turkey. "WAITRO-Int. Sem. on Interaction of R&D Institutes with Local Industry", (1986).
  A.9 Y.Tanık, M.Aşkar, A.Atalar, Modification of a Radio Link System from Analog to Digital. "IEEE Int. Symposium on Circuits and Systems", (1988).
  A.10 İ.Torunoğlu, M.Aşkar, A Fast Constraint Graph Generation Algorithm for VLSI Layout Compaction. "MELECON'94 7th Mediterranean Electrotechnical Conference", (1994).
  A.11 E.Ungan, M.Aşkar, A Gate Array Chip for High Frequency Applications. "MELECON'94 7th Mediterranean Electrotechnical Conference", (1994).
  A.12 G. Yardım, M.Aşkar, A CMOS Image Sensor Chip with on-chip non-integratig phododiodes designed by a current mode approach. "MELECON'96 8th Mediterranean Electrotechnical Conference", (1996).
  A.13 M.Altıntaş, M.Aşkar, Design and Implementation of a PN Matched Filter. "International Conference on Telecommunications", (1996).
  A.14 Öner, M. and Askar, M., Incremental Design of High Complexity FIR Filters by Genetic Algorithms. "ISSPA'99", (1999).
  A.15 Öner, M. and Askar, M., Hardware Synthesis of Integer Coefficient Digitan FIR Filters by Genetic Algorithms. "10th Conference on Signal Processing Applications and Technology", (1999).
  A.16 Öner, M. and Askar, M., A Genetic Algorithm for the Design of High Complexity Linear Phase FIR Filters. "ISPACS'99", (1999).
  A.17 Öner, M. and Askar, M., Crossover and Mutation Operators for a Genetic Algorithm applied to FIR Filter Synthesis. "ICICS'99", (1999).
  A.18 Ali Telli, Murat Aşkar, CMOS LNA Design for System-on-Chip Receiver Stages. "ASICON2003 - The 5th International Conference on ASIC", (2003).
  A.19 AliTelli, ŞimşekDemir, Murat Aşkar, Planar Spiral Inductor Measuring for RFIC Design. "ICECS2003 - 10th International Conference on Electronics, Circuits and Systems", (2003).
  A.20 Ali Telli, Şimşek Demir, Murat Aşkar, Planar Spiral Inductor Modeling for RF-IC Design. "VLSI'03-The 2003 International Conference on VLSI", (2003).
  A.21 Ali Telli, Murat Aşkar, CMOS LNA Design for Low Earth Orbit Space S-Band Applications. "CCECE 2003 - IEEE Canadian Conference on Electrical and Computer Engineering", (2003).
  A.22 E.Esen, A. Aydın Alatan, Murat Aşkar, Trellis Coded Quantization for Data Hiding. "EUROCON2003 - The International Conference on Computer as a Tool", (2003).
  A.23 Refik Sever, Neslin İsmailoğlu, Çağatay Tekmen, Murat Aşkar, A High Speed VLSI Implementation of the Rijndael Algorithm. "2004 IEEE International Symposium on Circuits and Systems", (2004).
  A.24 Refik Sever A. Neslin Ismailoğlu Yusuf Ç. Tekmen Murat Aşkar Burak Okcan, A High Speed FPGA Implementation Of The Rijndael Algorithm. "Euromicro Symposium On Digital System Design, Architectures, Methods And Tools", (2004).
  A.25 A. Telli, S.Demir, and M.Askar, Practical Performance of Planar Spiral Inductors. "11 th IEEE International Conference on Electronics, Circuits and Systems", (2004).
  A.26 Telli and M.Askar, CMOS LNA Design for System-on-Chip Receiver Stages. "IEEE 5th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems", (2004).
  A.27 Soner Yeşil, Neslin İsmailoğlu, Çağatay Tekmen, Murat Aşkar, Two Fast RSA Implementations Using High-Radix Montgomery Algorithm. "2004 IEEE International Symposium on Circuits and Systems", (2004).
  A.28 A.Neslin İsmailoğlu, Murat Aşkar, ASYNCHRONUS DESIGN OF SYSTOLIC ARCHITECTURES IN CMOS. "Proceedings of ISCAS 2007: IEEE International Symposium on Circuits and Systems", (2007).
  A.29 Neslin İsmailoğlu, Murat Aşkar, Delay Insensitivity Verification of Bit-Level Pipelined Systolic Arrays in Dual-Rail Treshold Logic. "ICECS 2008 - The 15th IEEE International Conference on Electronics, Circuits and Systems", (2008).
  A.30 Neslin İsmailoğlu, Murat Aşkar, SDIVA: Structural Delay Insensitivity Verification Analysis Method for Bit-Level Pipelined Systolic Arrays with Early Output Evaluation. "DSD 2008 - 11th EUROMICRO Conference on Digital System Design", (2008).
  A.31 Neslin İsmailoğlu, Murat Aşkar, Verification of Delay Insensitivity in Bit-Level Pipelined Dual-Rail Threshold Logic Adders. "Proceedings of The EHAC'08 (ELECTRONICS, HARDWARE, WIRELESS and OPTICAL COMMUNICATIONS Internationa", (2008).

Publications (NATIONAL)

 

Conference Papers

  A.1 O.V.Erdağ, M.Aşkar, Design of a VLSI X.25 Packet Router CMOS Chip. "7th National Electrical Engineering Conference", (1997).
  A.2 M.A.Öcal, M. Aşkar, Y.Z.İder, The Real Time Transmission of ECG Signals Through Telephone Lines Using Modems. "7th National Electrical Engineering Conference", (1997).
  A.3 Yeşil, S., İsmailoğlu, A. N., Aşkar, M., Tekmen, Y. Ç., Implementation of High-Speed RSA Crypto Chip Using Modified Montgomery Algorithm. "1. National Crypthology Conference", 1, (2005), s.34 - 43.
  A.4 Aşkar, M., Usage of Digital Signature in Workflow Processes. "22. National Informatics Congress", 1, (2005), s.29-32.
  A.5 Sever, R., İsmailoğlu, A.N., Aşkar, M., Tekmen Ç., Efficient High Speed Asic Implementation of The Rijndael Algorithm. "1. National Cyrpthology Conference", 1, (2005), s.23 - 33.
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